Level conversion for dual-supply systems [low power logic IC design]

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn 2003-January, Issue , 2003, Pages 164-167

  Ishihara, F ^a,b   Sheikh, F ^a   Nikolic B ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b TOSHIBA CORPORATION   (Japan)

Author keywords

Circuits; Costs; Delay; Flip flops; Large scale integration; Permission; Power dissipation; Power system modeling; Robustness; Voltage

Indexed keywords

COSTS; DELAY CIRCUITS; DESIGN; ELECTRIC POTENTIAL; ENERGY DISSIPATION; FLIP FLOP CIRCUITS; LOW POWER ELECTRONICS; LSI CIRCUITS; NETWORKS (CIRCUITS); POWER ELECTRONICS; PRODUCT DESIGN; ROBUSTNESS (CONTROL SYSTEMS); VOLTAGE SCALING;

CLUSTERED VOLTAGE SCALING; DELAY; DUAL SUPPLY VOLTAGE DESIGN; EFFECTIVE APPROACHES; ENERGY DELAY PRODUCT; LEVEL CONVERSIONS; PERMISSION; POWER SYSTEM MODEL;

INTEGRATED CIRCUIT DESIGN;

EID: 1542269352     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPE.2003.1231854     Document Type: Conference Paper

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