Continual flow pipelines: Achieving resource-efficient latency tolerance

IEEE Micro

Volumn 24, Issue 6, 2004, Pages 62-73

  Srinivasan, Srikanth T ^a,c   Rajwar, Ravi ^a   Akkary, Haitham ^a   Gandhi, Amit ^b   Upton, Michael ^a  

^a Intel's Microprocessor Technology Labs   (United States)

^b PORTLAND STATE UNIVERSITY   (United States)

^c INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONTINUAL FLOW PIPELINES; LARGE INSTRUCTION WINDOW;

BUFFER STORAGE; CACHE MEMORY; COMPUTER ARCHITECTURE; FAULT TOLERANT COMPUTER SYSTEMS; PERFORMANCE; PIPELINE PROCESSING SYSTEMS;

MICROPROCESSOR CHIPS;

EID: 15044350084     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2004.71     Document Type: Article

References (13)

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