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Volumn , Issue , 2004, Pages 189-198

Compiler orchestrated prefetching via speculation and predication

Author keywords

Precomputation; Predicated execution; Prefetching; Speculation

Indexed keywords

BENCHMARKING; COMPUTATIONAL METHODS; COMPUTER SCIENCE; DATA PROCESSING; MICROPROCESSOR CHIPS; OPTIMIZATION; SCHEDULING; STORAGE ALLOCATION (COMPUTER);

EID: 12844272747     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1037947.1024416     Document Type: Conference Paper
Times cited : (23)

References (41)
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    • Abraham, S.1    Rau, B.R.2
  • 8
    • 0003758490 scopus 로고
    • Generalized correlation-based hardware prefetching
    • Cornell University, Feb.
    • M. Charney and A. Reeves. Generalized correlation-based hardware prefetching. Technical Report EE-CEG-95-1, Cornell University, Feb. 1995.
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    • Charney, M.1    Reeves, A.2
  • 19
    • 0033075109 scopus 로고    scopus 로고
    • Prefetching using Markov predictors
    • Feb.
    • D. Joseph and D. Grunwald. Prefetching using Markov predictors. IEEE Transactions on Computers, 48(2):121-133, Feb. 1999.
    • (1999) IEEE Transactions on Computers , vol.48 , Issue.2 , pp. 121-133
    • Joseph, D.1    Grunwald, D.2
  • 23
    • 85008031236 scopus 로고    scopus 로고
    • MinneSPEC: A new SPEC benchmark workload for simulation-based computer architecture research
    • A. KleinOsowski and D. Lilja. MinneSPEC: A new SPEC benchmark workload for simulation-based computer architecture research. Computer Architecture Letters, 1, 2002.
    • (2002) Computer Architecture Letters , vol.1
    • Kleinosowski, A.1    Lilja, D.2
  • 33
    • 0009755242 scopus 로고
    • Iterative modulo scheduling
    • HP Labs, Nov.
    • B. R. Rau. Iterative modulo scheduling. Technical Report Technical Report HPL-94-115, HP Labs, Nov. 1995.
    • (1995) Technical Report Technical Report , vol.HPL-94-115
    • Rau, B.R.1
  • 37
    • 0003081830 scopus 로고
    • An efficient hardware algorithm for exploiting multiple arithmetic units
    • Jan.
    • R. Tomasulo. An efficient hardware algorithm for exploiting multiple arithmetic units. IBM Journal, 44-5:25-33, Jan. 1967.
    • (1967) IBM Journal , vol.44 , Issue.5 , pp. 25-33
    • Tomasulo, R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.