Reduction of CV hysteresis in metal/high-k MISFETs using flash lamp post deposition annealing

Materials Research Society Symposium Proceedings

Volumn 811, Issue , 2004, Pages 87-92

  Matsuki, Takeo ^a   Akasaka, Yasushi ^a   Hayashi, Kiyoshi ^a   Noguchi, Masataka ^a   Yamashita, Koji ^a   Syoji, Hideyuki ^a   Torii, Kazuyoshi ^a   Kasai, Naoki ^a   Arikado, Tsunetoshi ^a  

^a SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CHEMICAL VAPOR DEPOSITION; ELECTRODES; HAFNIUM COMPOUNDS; MISFET DEVICES; NATURAL FREQUENCIES; RAPID THERMAL ANNEALING; THIN FILMS;

ATOMIC LAYER DEPOSITION (ALD); ENERGY DENSITY; GATE INSULATORS; NEGATIVE BIAS INSTABILITY (NBTI);

HYSTERESIS;

EID: 12744267828     PISSN: 02729172     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1557/proc-811-d3.13     Document Type: Conference Paper

References (10)

1. W. Tsai, L. A. Ragnarsson, L. Pantisano, P.J. Chen, B. Onsia, T. Schram, E. Cartier, A. Kerber, E. Young, M. Caymax, S. De Gendt and M. Heyns, Tech. Dig. IEDM 2003, p.311, (2003)
2. H. Ohji, A. Mutoh, K. Torii, R. Mitsuhashi, A. Horiuchi, T. Maeda, H. Itoh, T. Kawahara, K. Hayashi, T. Sasaki, N. Kasai, H. Kitajima, M. Yasuhira and T. Arikado, Ext. Abst. SSDM, p. 166 (2003)
3. A. Chatterjee, R.A. Chapman, K. Joyner, M. Otobe, S. Hattangady, M. Bevan, G.A. Brown, H, Yang, Q. He, D. Rogers, S.J. Fang, R. Kraft, A.L.P. Rotondaro, m. Terry, K. Brennan, S.-W. Aur, J.C. Hu, H-L Tsai, P.Jones, G. Wilk, M. Aoki, M. Rodder and I.-C. Chen, Tech. Dig. IEDM, p.777 (1998)
4. A. Yagishita, T. Saito, K. Nakajima, S. Inumiya, Y. Akasaka, Y. Ozawa, G. Minamihara, H. Yano, K. Hieda, K. Suguro, T. Arikado and K. Okumura, Tech. Dig. IEDM, p.785 (1998)
5. K. Yamashita, H. Nishimori, M. Yoshioka, T. Kusuda, T. Arikado and K. Okumura, Proc. International symposium on Semiconductor Manufacturing, p. 153 (2003)
6. K. Nishinohara, T. Ito and K. Suguro, Proc. International symposium on Semiconductor Manufacturing, p. 175 (2003)
7. T. Matsuki, K. Torii, T. Maeda, H. Syoji, K. Kiyono, Y. Akasaka, K. Hayashi, N. Kasai and T. Arikado, Proc. The 2004 International Conference on Microelectronic Test Structures, p. 105 (2004)
8. F. Ootsuka, IEEE Trans. Electron Devices, Vol.49, No.12, p.2345 (2002)
9. R. Mitsuhashi, A. Horiuchi, A. Uedono and K. Torii, Ext. Abst. International Workshop on Gate Insulator, p. 150 (2003)
10. W.S. Kim, T. Kawahara, H. Itoh, A. Horiuchi, A. Muto, T. Maeda, R. Mitsuhashi, K. Torii and H. Kitajima, Ext. Abst. SSDM, p.806 (2003)