On the exploration of the solution space in analog placement with symmetry constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 2, 2004, Pages 177-191

  Balasa, Florin ^a   Maruvada, Sarat C ^a   Krishnamoorthy, Karthik ^a  

^a 1120 Science and Engineering Offices   (United States)

Author keywords

Analog placement; B* tree; O tree; Sequence pair; Topological representations

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED DESIGN; DATA STRUCTURES; GRAPH THEORY; LINEAR INTEGRATED CIRCUITS; SIMULATED ANNEALING;

ANALOG PLACEMENT; SEQUENCE-PAIR; SYMMETRY CONSTRAINTS; TOPOLOGICAL REPRESENTATIONS;

INTEGRATED CIRCUIT LAYOUT;

EID: 1242286062     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2003.822132     Document Type: Article

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