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Volumn 2, Issue , 2003, Pages 499-502

Power characteristics of inductive interconnect

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTIC SOLUTION; DYNAMIC POWER; INDUCTIVE INTERCONNECT; MATCHING CONDITION; POWER CHARACTERISTIC; POWER CONSUMPTION; POWER DISSIPATION; SHORT-CIRCUIT POWER; SIGNAL TRANSITION; SYNTHESIS TECHNIQUES; TRANSITION TIME; WIRE SIZING;

EID: 12344252501     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2003.1301831     Document Type: Conference Paper
Times cited : (1)

References (8)
  • 4
    • 0030246821 scopus 로고    scopus 로고
    • High-speed clock network sizing optimization based on Distributed RC and Lossy RLC interconnect models
    • September
    • Q. Zhu and W. M. Dai. "High-speed Clock Network Sizing Optimization Based on Distributed RC and Lossy RLC Interconnect Models" IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, Vol. 15, No.9.pp.1106-1118,September 1996.
    • (1996) IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems , vol.15 , Issue.9 , pp. 1106-1118
    • Zhu, Q.1    Dai, W.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.