Tolerance-based process proximity correction (PPC) verification methodology

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5446, Issue PART 2, 2004, Pages 471-480

  Hashimoto, Kohji ^a   Fujise, Hiroharu ^a   Nojima, Shigeki ^a   Ito, Takeshi ^a   Ikeda, Takahiro ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

Pattern Feature Extraction; Process Proximity Effect (PPE); Tandem Process Proximity Correction (PPC); Tolerance based PPC verification

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; DATA PROCESSING; FABRICATION; FEATURE EXTRACTION; LSI CIRCUITS; MASKS; PROCESS CONTROL; SILICON WAFERS;

PATTERN FEATURE EXTRACTION; PROCESS PROXIMITY EFFECT (PPE); TANDEM PROCESS PROXIMITY CORRECTION (PPC); TOLERANCE BASED PPC VERIFICATION;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 11844294098     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.557795     Document Type: Conference Paper

References (7)

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