An adaptive chip-multiprocessor architecture for future mobile terminals

Proceedings of the 2002 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES '02

Volumn , Issue , 2002, Pages 43-49

  Nikitovic, Mladen ^a   Brorsson, Mats ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY KTH   (Sweden)

Author keywords

Chip multiprocessor (CMP); Energy aware scheduling; Mobile terminals; Power consumption

Indexed keywords

CHIP-MULTIPROCESSOR; ENERGY-AWARE SCHEDULING; FREQUENCY-SCALING; HEAT DISSIPATION; MOBILE SYSTEMS; MOBILE TERMINAL; ORDERS OF MAGNITUDE; PACKAGING COSTS; PERFORMANCE COSTS; POWER CONSUMPTION; POWER SAVINGS; PROPOSED ARCHITECTURES; SAVE ENERGY; SIMULATION MODEL; SOFTWARE IMPLEMENTATION; SYSTEM LEVELS;

CHIP SCALE PACKAGES; COMPUTER SIMULATION; COMPUTER TERMINALS; EMBEDDED SYSTEMS; MOBILE PHONES; MOBILE TELECOMMUNICATION SYSTEMS; MULTIPROCESSING SYSTEMS; PROGRAM COMPILERS; SCHEDULING; SYNTHESIS (CHEMICAL);

SOFTWARE ARCHITECTURE;

EID: 11144289189     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/581630.581638     Document Type: Conference Paper

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