Single electron memory devices: Toward background charge insensitive operation

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 21, Issue 6, 2003, Pages 2860-2864

  Yadavalli, Kameshwar K ^a   Orlov, Alexei O ^a   Snider, Gregory L ^a   Korotkov, Alexander N ^b  

^a University of Notre Dame   (United States)

^b University of California Riverside   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; CAPACITANCE; CHARGE TRANSFER; COULOMB BLOCKADE; ELECTRIC CHARGE; ELECTRIC CURRENTS; ELECTROMETERS; ELECTRON TRAPS; GATES (TRANSISTOR); INTEGRATED CIRCUITS; REDUNDANCY; SILICA;

CONTROL GATES; FLOATING GATES; SINGLE ELECTRON MEMORY CELLS;

DATA STORAGE EQUIPMENT;

EID: 0942300035     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1625957     Document Type: Conference Paper

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