Technique for preventing stiction and notching effect on silicon-on-insulator microstructure

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

Volumn 21, Issue 6, 2003, Pages 2530-2539

  Li, J ^a   Zhang, Q X ^b   Liu, A Q ^a   Goh, W L ^a   Ahn, J ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ANISOTROPY; ASPECT RATIO; HEAT CONDUCTION; MICROELECTROMECHANICAL DEVICES; MICROSTRUCTURE; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; REACTIVE ION ETCHING; SCANNING ELECTRON MICROSCOPY; SINGLE CRYSTALS;

MICROSTRUCTURE FABRICATION; SPACER OXIDE THIN FILMS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0942289265     PISSN: 10711023     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1623509     Document Type: Article

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