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Volumn , Issue , 2003, Pages 66-73

Bus-Driven Floorplanning

Author keywords

[No Author keywords available]

Indexed keywords

BUS DRIVEN FLOORPLANNING (BDF);

EID: 0347409244     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (25)

References (8)
  • 2
    • 0030378255 scopus 로고    scopus 로고
    • VLSI module placement based on rectangle-packing by the sequence-pair
    • H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani. "VLSI module placement based on rectangle-packing by the sequence-pair", IEEE Transaction on CAD, vol. 15:12, pp. 1518-1524, 1996.
    • (1996) IEEE Transaction on CAD , vol.15 , Issue.12 , pp. 1518-1524
    • Murata, H.1    Fujiyoshi, K.2    Nakatake, S.3    Kajitani, Y.4
  • 8
    • 84962289614 scopus 로고    scopus 로고
    • A unified method to handle different kinds of placement constraints in floorplan design
    • Bangalore, India, Jan
    • F. Y. Young, C. N. Chu and M. L. Ho. "A unified method to handle different kinds of placement constraints in floorplan design", Proceedings of the 15th International Conference on VLSI Design, Bangalore, India, pp. 661-667, Jan 2002.
    • (2002) Proceedings of the 15th International Conference on VLSI Design , pp. 661-667
    • Young, F.Y.1    Chu, C.N.2    Ho, M.L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.