VLSI/PCB placement with predefined coordinate alignment constraint based on sequence pair

International Conference on ASIC, Proceedings

Volumn , Issue , 2001, Pages 167-170

  Liu, Rui ^a   Hong, Xianlong ^a   Dong, Sheqin ^a   Cai, Yici ^a   Gu, Jun ^a  

^a INSTITUTE OF SOFTWARE   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; PRINTED CIRCUIT BOARDS; SIMULATED ANNEALING; THEOREM PROVING; VLSI CIRCUITS;

POLYNOMIAL-TIME ALGORITHM; PREDEFINED COORDINATE ALIGNMENT CONSTRAINT; SEQUENCE PAIR;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035721248     PISSN: None     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (9)

1. VLSI/PCB placement with obstacles based on sequence pair
2. Module placement with boundary constraints using the sequence-pair representation
3. FAST-SP: A fast algorithm for block placement based on sequence pair
4. Rectangle-packing based module placement
5. VLSI module placement based on rectangle-packing by the sequence pair
6. A layout approach to monolithic microwave IC
7. Bounded-slicing structure for module placement
8. Module placement on BSG-structure and IC layout applications