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Volumn , Issue , 2003, Pages 227-231

Performance optimization of latency insensitive systems through buffer queue sizing of communication channels

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER QUEUE SIZING; INTERCONNECT DELAY; LATENCY INSENSITIVE SYSTEMS;

EID: 0347409198     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (36)

References (14)
  • 1
    • 0003336730 scopus 로고    scopus 로고
    • Challenges and opportunities for design innovations in nanometer technologies
    • J. Cong. Challenges and opportunities for design innovations in nanometer technologies. In Frontiers in Semiconductor Research: A Collection of SRC Working Papers. Semiconductor Research Corporation, http://www.src.org/prg_mgmt/frontier.dgw, 1997.
    • (1997) Frontiers in Semiconductor Research: A Collection of SRC Working Papers
    • Cong, J.1
  • 2
    • 0031232922 scopus 로고    scopus 로고
    • Will physical scalability sabotage performance gains?
    • September
    • D. Matzke. Will physical scalability sabotage performance gains? IEEE Computer, 8:37-39, September 1997.
    • (1997) IEEE Computer , vol.8 , pp. 37-39
    • Matzke, D.1
  • 4
    • 0000090413 scopus 로고    scopus 로고
    • An interconnect-centric design flow for nanometer technologies
    • April
    • J. Cong. An interconnect-centric design flow for nanometer technologies. Proc. of the IEEE, 89:505-528, April 2001.
    • (2001) Proc. of the IEEE , vol.89 , pp. 505-528
    • Cong, J.1
  • 5
  • 7
    • 0034853842 scopus 로고    scopus 로고
    • Robust interfaces for mixed-timing systems with application to latency-insensitive protocols
    • T. Chelcea and S. M. Nowick. Robust interfaces for mixed-timing systems with application to latency-insensitive protocols. In Proc. Design Automation Conf, 2001.
    • (2001) Proc. Design Automation Conf
    • Chelcea, T.1    Nowick, S.M.2
  • 11
    • 24544459615 scopus 로고    scopus 로고
    • Performance analysis and efficient implementation of latency insensitive systems
    • School of Electrical & Computer Engineering, Purdue University, March
    • Ruibing Lu and Cheng-Kok Koh. Performance analysis and efficient implementation of latency insensitive systems. Technical Report TR-ECE03-06, School of Electrical & Computer Engineering, Purdue University, March 2003.
    • (2003) Technical Report , vol.TR-ECE03-06
    • Lu, R.1    Koh, C.-K.2
  • 13
    • 0001391363 scopus 로고
    • A characterization of the minimum cycle mean in a digraph
    • R. M. Karp. A characterization of the minimum cycle mean in a digraph. Discrete Math., 23:309-311, 1978.
    • (1978) Discrete Math. , vol.23 , pp. 309-311
    • Karp, R.M.1
  • 14
    • 84855632583 scopus 로고    scopus 로고
    • ftp://ftp.es.ele.tue.nl/pub/lp_solve/.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.