High-speed InP/InGaAs DHBTs with a thin pseudomorphic base

Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)

Volumn , Issue , 2003, Pages 211-214

  Ida, Minoru ^a   Kurishima, Kenji ^a   Ishii, Kiyoshi ^a   Watanabe, Noriyuki ^a,b  

^a NTT CORPORATION   (Japan)

^b NTT Advanced Technology Corporation   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN; ELECTRIC RESISTANCE; ELECTRIC SPACE CHARGE; EMITTER COUPLED LOGIC CIRCUITS; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES; METALLORGANIC VAPOR PHASE EPITAXY; OSCILLATORS (ELECTRONIC); SEMICONDUCTING INDIUM GALLIUM ARSENIDE; SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR DOPING; TRANSCONDUCTANCE;

DOUBLE HETEROJUNCTION BIPOLAR TRANSISTORS; LOW PRESSURE METALLORGANIC VAPOR PHASE EPITAXY; RING OSCILLATOR; THIN PSEUDOMORPHIC BASE;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 0346394363     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/gaas.2003.1252396     Document Type: Conference Paper

References (11)

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