On reducing register pressure and energy in multiple-banked register files

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2003, Pages 14-20

  Abella, Jaume ^a   González, Antonio ^a  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; DESIGN FOR TESTABILITY; ELECTRIC POWER SUPPLIES TO APPARATUS; MICROELECTRONIC PROCESSING;

DYNAMIC POWER DISSIPATION; MULTIPLE BANKED REGISTER FILES; STATIC POWER DISSIPATION;

MICROPROCESSOR CHIPS;

EID: 0344982159     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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