Buffer-oriented methodology for microarchitecture validation

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 16, Issue 1-2, 2000, Pages 49-65

  Utamaphethal, Noppanunt ^a   Shawn Blanton, R D ^a,b   Shen, John Paul ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; COMPUTER SOFTWARE; COMPUTER TESTING;

BUFFER ORIENTED METHODOLOGY; DESIGN VALIDATION; FINITE STATE MACHINE MODEL; MICROARCHITECTURE VALIDATION; PROCESSOR VALIDATION; SUPERSCALAR MICROSTRUCTURE;

MICROCOMPUTERS;

EID: 0342483883     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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