-
1
-
-
0027887957
-
GaAs-based heterojunction bipolar transistors for very high-performance electronic circuits
-
Dec.
-
P. M. Asbeck, F. M.-C. Chang, K.-C. Wang, G. J. Sullivan, and D. T. Cheung, "GaAs-based heterojunction bipolar transistors for very high-performance electronic circuits," Proc. IEEE, vol. 81, pp. 1709-1726, Dec. 1993.
-
(1993)
Proc. IEEE
, vol.81
, pp. 1709-1726
-
-
Asbeck, P.M.1
Chang, F.M.-C.2
Wang, K.-C.3
Sullivan, G.J.4
Cheung, D.T.5
-
2
-
-
0041489453
-
A 40-GHz D-type flip-flop using AlGaAs/GaAs HBTs
-
Oct.
-
Y. Kuriyama, T. Sugiyama, S. Hongo, J. Akagi, K. Tsuda, N. Iizuka, and M. Obara, "A 40-GHz D-type flip-flop using AlGaAs/GaAs HBTs," IEEE J. Solid-State Circuits, vol. 30, pp. 1128-1130. Oct. 1995.
-
(1995)
IEEE J. Solid-state Circuits
, vol.30
, pp. 1128-1130
-
-
Kuriyama, Y.1
Sugiyama, T.2
Hongo, S.3
Akagi, J.4
Tsuda, K.5
Iizuka, N.6
Obara, M.7
-
3
-
-
0000120650
-
Very high-speed InPAnGaAs HBT ICs for optical transmission systems
-
Sept.
-
H. Suzuki, K. Watanabe, K. Ishikawa, H. Masuda, K. Ouchi, T. Tanoue, and R. Takeyari, "Very high-speed InPAnGaAs HBT ICs for optical transmission systems," IEEE J. Solid-State Circuits, vol. 33, pp. 1313-1320, Sept. 1998.
-
(1998)
IEEE J. Solid-state Circuits
, vol.33
, pp. 1313-1320
-
-
Suzuki, H.1
Watanabe, K.2
Ishikawa, K.3
Masuda, H.4
Ouchi, K.5
Tanoue, T.6
Takeyari, R.7
-
4
-
-
0031071685
-
42 GHz static frequency divider in a Si/SiGe bipolar technology
-
M. Wurzer, T. F. Meister, H. Schafer, H. Knapp, J. Bock, R. Stengl, K. Aufinger, M. Franosch, M. Rest, M. Möller, H.-M. Rein, and A. Felder, "42 GHz static frequency divider in a Si/SiGe bipolar technology," in IEEE Int. Solid-State Circuits Conf., 1997, pp. 122-123.
-
(1997)
IEEE Int. Solid-state Circuits Conf.
, pp. 122-123
-
-
Wurzer, M.1
Meister, T.F.2
Schafer, H.3
Knapp, H.4
Bock, J.5
Stengl, R.6
Aufinger, K.7
Franosch, M.8
Rest, M.9
Möller, M.10
Rein, H.-M.11
Felder, A.12
-
5
-
-
0030213937
-
Design considerations for very high-speed Si-bipolar ICs operating up to 50 Gb/s
-
Aug.
-
H.-M. Rein and M. Möller, "Design considerations for very high-speed Si-bipolar ICs operating up to 50 Gb/s," IEEE J. Solid State Circuits, vol. 31, pp. 1076-1090, Aug. 1996.
-
(1996)
IEEE J. Solid State Circuits
, vol.31
, pp. 1076-1090
-
-
Rein, H.-M.1
Möller, M.2
-
6
-
-
0001477057
-
An 80 Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs
-
Sept.
-
T. Otsuji, K. Murata, T. Enoki, and Y. Umeda, "An 80 Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs," IEEE J. Solid State Circuits, vol. 33, pp. 1321-1327, Sept. 1998.
-
(1998)
IEEE J. Solid State Circuits
, vol.33
, pp. 1321-1327
-
-
Otsuji, T.1
Murata, K.2
Enoki, T.3
Umeda, Y.4
-
7
-
-
0031271955
-
Silicon bipolar IC for PRBS testing generates adjustable bit rates up to 25 Gbit/S
-
Nov.
-
F. Schumann and J. Bock, "Silicon bipolar IC for PRBS testing generates adjustable bit rates up to 25 Gbit/S," Electron. Lett., vol. 33, pp. 2022-2023, Nov. 1997.
-
(1997)
Electron. Lett.
, vol.33
, pp. 2022-2023
-
-
Schumann, F.1
Bock, J.2
-
8
-
-
0027929106
-
GaAs HBT gate array for high performance ASICS
-
S. Yinger, F. Lee, R. T. Huang, K. Schneider, E. Wang, K. Smith, M. Penugonda, S. Jacobs, and T. Carter, "GaAs HBT gate array for high performance ASICS," in IEEE Custom Integrated Circuits Conf., 1994, pp. 611-614.
-
(1994)
IEEE Custom Integrated Circuits Conf.
, pp. 611-614
-
-
Yinger, S.1
Lee, F.2
Huang, R.T.3
Schneider, K.4
Wang, E.5
Smith, K.6
Penugonda, M.7
Jacobs, S.8
Carter, T.9
-
9
-
-
0031677849
-
A 10-Gb/s silicon bipolar IC for PRBS testing
-
Jan.
-
O. Kromat, U. Langmann, G. Hanke, and W. J. Hillery, "A 10-Gb/s silicon bipolar IC for PRBS testing," IEEE J. Solid State Circuits, vol. 33, pp. 76-85, Jan. 1998.
-
(1998)
IEEE J. Solid State Circuits
, vol.33
, pp. 76-85
-
-
Kromat, O.1
Langmann, U.2
Hanke, G.3
Hillery, W.J.4
-
10
-
-
0027813979
-
A 12.5 Gb/s si bipolar IC for PRBS generation and bit error detection up to 25 Gb/s
-
Dec.
-
M. Bußmann, U. Langmann, W. J. Hillery, and W. W. Brown, "A 12.5 Gb/s Si bipolar IC for PRBS generation and bit error detection up to 25 Gb/s," IEEE J. Solid State Circuits, vol. 28, pp. 1303-1309, Dec. 1993.
-
(1993)
IEEE J. Solid State Circuits
, vol.28
, pp. 1303-1309
-
-
Bußmann, M.1
Langmann, U.2
Hillery, W.J.3
Brown, W.W.4
-
11
-
-
0028516012
-
A voltage compensated series-gate bipolar circuit operating at sub-2V
-
Oct.
-
H. Sato, K. Ueda, N. Sasaki, T. Ikeda, and K. Mashiko, "A voltage compensated series-gate bipolar circuit operating at sub-2V," IEEE J. Solid State Circuits, vol. 29, pp. 1200-1204, Oct. 1994.
-
(1994)
IEEE J. Solid State Circuits
, vol.29
, pp. 1200-1204
-
-
Sato, H.1
Ueda, K.2
Sasaki, N.3
Ikeda, T.4
Mashiko, K.5
-
12
-
-
0029255547
-
1.65 Gb/s 60 m W 4: 1 multiplexer and 1.8 Gb/s 80 m W 1:4 demultiplexer ICs using 2v 3-level series-gating ECL circuits
-
T. Kuroda, T. Fujita, Y. Itabashi, S. Kabumoto, M. Noda, and A. Kanuma, "1.65 Gb/s 60 m W 4: 1 multiplexer and 1.8 Gb/s 80 m W 1:4 demultiplexer ICs using 2v 3-level series-gating ECL circuits," in 1995 IEEE Int. Solid-State Circuits Conf., 1995, pp. 36-37.
-
(1995)
1995 IEEE Int. Solid-state Circuits Conf.
, pp. 36-37
-
-
Kuroda, T.1
Fujita, T.2
Itabashi, Y.3
Kabumoto, S.4
Noda, M.5
Kanuma, A.6
-
13
-
-
0031075777
-
A high-speed, low-power bipolar digital circuit for Gb/s LSIs: Current mirror control logic
-
Feb.
-
K. Kishine, Y. Kobayashi, and H. Ichino, "A high-speed, low-power bipolar digital circuit for Gb/s LSIs: Current mirror control logic," IEEE J. Solid-State Circuits, vol. 32, pp. 215-221, Feb. 1997.
-
(1997)
IEEE J. Solid-state Circuits
, vol.32
, pp. 215-221
-
-
Kishine, K.1
Kobayashi, Y.2
Ichino, H.3
-
14
-
-
0029532196
-
Reliable ICs fabricated using a production GaAs HBT process for military and commercial applications
-
F. M. Yamada, A. K. Oki, D. C. Streit, D. K. Umemoto, L. T. Tran, K. W. Kobayashi, P. C. Grossman, T. R. Block, M. D. Lammert, S. R. Olson, J. C. Cowles, M. M. Hoppe, S. B. Bui, D. M. Smith, K. Najita, H. J. Hennecke, and E. A. Rezek, "Reliable ICs fabricated using a production GaAs HBT process for military and commercial applications." in IEEE Military Commun. Conf. Ret:, 1995, pp. 760-764.
-
(1995)
IEEE Military Commun. Conf. Ret
, pp. 760-764
-
-
Yamada, F.M.1
Oki, A.K.2
Streit, D.C.3
Umemoto, D.K.4
Tran, L.T.5
Kobayashi, K.W.6
Grossman, P.C.7
Block, T.R.8
Lammert, M.D.9
Olson, S.R.10
Cowles, J.C.11
Hoppe, M.M.12
Bui, S.B.13
Smith, D.M.14
Najita, K.15
Hennecke, H.J.16
Rezek, E.A.17
-
15
-
-
0343531605
-
-
Ph.D. dissertation, Univ. Southern CA, Los Angeles, CA, Dec.
-
M. G. Chen, "A half-tone frequency detector and digital circuit techniques for high-speed clock/data recovery," Ph.D. dissertation, Univ. Southern CA, Los Angeles, CA, Dec. 1998.
-
(1998)
A Half-tone Frequency Detector and Digital Circuit Techniques for High-speed Clock/data Recovery
-
-
Chen, M.G.1
-
16
-
-
0030381779
-
Generation of high-speed pseudorandom sequences using multiplex-techniques
-
Dec.
-
F. Sinnesbichler, A. Ebberg, A. Felder, and R. Weigel, "Generation of high-speed pseudorandom sequences using multiplex-techniques," IEEE Trans. Microwave Theory Tech., vol. 44, pp. 2738-2742, Dec. 1996.
-
(1996)
IEEE Trans. Microwave Theory Tech.
, vol.44
, pp. 2738-2742
-
-
Sinnesbichler, F.1
Ebberg, A.2
Felder, A.3
Weigel, R.4
-
17
-
-
0030405059
-
A super-dynamic flip-flop circuit for broadband applications up to 24 Gbit/s utilizing production-level 0.2-um GaAs MESFETS
-
T. Otsuji, M. Yoneyama, K. Murata, and E. Sano, "A super-dynamic flip-flop circuit for broadband applications up to 24 Gbit/s utilizing production-level 0.2-um GaAs MESFETS," in IEEE GaAs IC Symp. Tech. Dig., 1996, pp. 145-148.
-
(1996)
IEEE GaAs Ic Symp. Tech. Dig.
, pp. 145-148
-
-
Otsuji, T.1
Yoneyama, M.2
Murata, K.3
Sano, E.4
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