Room-temperature si single-electron memory fabricated by nanoimprint lithography

Applied Physics Letters

Volumn 83, Issue 11, 2003, Pages 2268-2270

  Wu, Wei ^a   Gu, Jian ^a   Ge, Haixiong ^a   Keimel, Christopher ^a   Chou, Stephen Y ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FABRICATION; LITHOGRAPHY; SILICON;

SINGLE-ELECTRON MEMORY (SEME);

MESFET DEVICES;

EID: 0142026321     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1610814     Document Type: Article

References (10)

1. K. Yano, T. Ishii, T. Hashimoto, T. Kobayashi, F. Murai, and K. Seki, IEEE Trans. Electron Devices 41, 1628 (1994).
2. L. J. Guo, E. Leobandung, and S. Y. Chou, Science 275, 649 (1997).
3. A. Nakajima, T. Futatsugi, K. Kosemura, T. Fukano, and N. Yokoyama, Appl. Phys. Lett. 70, 1742 (1997).
4. B. J. Hinds, T. Yamanaka, and S. Oda, J. Appl. Phys. 90, 6402 (2001).
5. H. Grabert, M. H. Devoret, and North Atlantic Treaty Organization. Scientific Affairs Division, Single Charge Tunneling: Coulomb Blockade Phenomena in Nanostructures (Plenum, New York, 1992).
6. S. Y. Chou, P. R. Krauss, and P. J. Renstrom, Science 272, 85 (1996).
7. D. V. Averin, A. N. Korotkov, and K. K. Likharev, Phys. Rev. B 44, 6199 (1991).
8. S. Y. Chou, P. R. Krauss,-W. Zhang, L. J. Guo, and L. Zhuang, J. Vac. Sci. Technol. B 15, 2897 (1997).
9. W. Zhang and S. Y. Chou, Appl. Phys. Lett. 79, 845 (2001).
10. H. I. Liu, D. K. Biegelsen, N. M. Johnson, F. A. Ponce, and R. F. W. Pease, J. Vac. Sci. Technol. B 11, 2532 (1993).