-
1
-
-
0035158946
-
XQXQXQ
-
B. Cheng, B. Maiti, S. Samayedam, J. Grant, B. Taylor, P. Tobin, and J. Mogab, "XQXQXQ," in IEEE Intl. SOI Conf. Proc., 2001, pp. 91-92.
-
(2001)
IEEE Intl. SOI Conf. Proc.
, pp. 91-92
-
-
Cheng, B.1
Maiti, B.2
Samayedam, S.3
Grant, J.4
Taylor, B.5
Tobin, P.6
Mogab, J.7
-
2
-
-
0036540912
-
Dual work function metal gate CMOS transistors by Ni-Ti interdiffusion
-
I. Polishchuk, P. Ranade, T.-J. King, and C. Hu, "Dual work function metal gate CMOS transistors by Ni-Ti interdiffusion," IEEE Electron Device Lett., vol. 23, pp. 200-202, 2002.
-
(2002)
IEEE Electron Device Lett.
, vol.23
, pp. 200-202
-
-
Polishchuk, I.1
Ranade, P.2
King, T.-J.3
Hu, C.4
-
3
-
-
0034790245
-
Metal gate work function adjustment for future CMOS technology
-
Q. Lu, R. Lin, P. Randae, T.-J. King, and C. Hu, "Metal gate work function adjustment for future CMOS technology," in Symp. VLSI Tech. Dig., 2001, pp. 45-46.
-
(2001)
Symp. VLSI Tech. Dig.
, pp. 45-46
-
-
Lu, Q.1
Lin, R.2
Randae, P.3
King, T.-J.4
Hu, C.5
-
4
-
-
0036923256
-
A novel nickel SALICIDE process technology for CMOS devices with sub-40 nm physical gate length
-
J. P. Lu, D. Miles, J. Zhao, A. Gurba, Y. Xu, C. Lin, M. Hewson, J. Ruan, L. Tsung, R. Kuan, T. Grider, D. Mercer, and C. Montgomery, "A novel nickel SALICIDE process technology for CMOS devices with sub-40 nm physical gate length," in IEDM Tech. Dig., 2002, pp. 371-374.
-
(2002)
IEDM Tech. Dig.
, pp. 371-374
-
-
Lu, J.P.1
Miles, D.2
Zhao, J.3
Gurba, A.4
Xu, Y.5
Lin, C.6
Hewson, M.7
Ruan, J.8
Tsung, L.9
Kuan, R.10
Grider, T.11
Mercer, D.12
Montgomery, C.13
-
5
-
-
0141928236
-
Redistribution of dopant arsenic during silicide formation
-
L. R. Zheng, L. S. Hung, and J. W. Mayer, "Redistribution of dopant arsenic during silicide formation," J. Appl. Phys., vol. 58, pp. 1505-1514, 1985.
-
(1985)
J. Appl. Phys.
, vol.58
, pp. 1505-1514
-
-
Zheng, L.R.1
Hung, L.S.2
Mayer, J.W.3
-
6
-
-
0041893270
-
2) polysilicon: A novel approach to very low-resistive gate (∼2 Ω/□) without metal CMP nor etching
-
2) polysilicon: A novel approach to very low-resistive gate (∼2 Ω/□) without metal CMP nor etching," in IEDM Tech. Dig., 2001, pp. 37.5.1-37.5.4.
-
(2001)
IEDM Tech. Dig.
, pp. 3751-3754
-
-
Tavel, B.1
Skotnicki, T.2
Pares, G.3
Carrière, N.4
Rivoire, M.5
Leverd, F.6
Julien, C.7
Torres, J.8
Pantel, R.9
-
7
-
-
0036932380
-
Transistors with dual work funation metal gate by single full silicidation (FUSI) of polysilicon gates
-
W. P. Maszara, Z. Krivokapic, P. King, J.-S. GooIlgweon, and M.-R. Lin, "Transistors with dual work funation metal gate by single full silicidation (FUSI) of polysilicon gates." in IEDM Tech. Dig., 2002, pp. 367-370.
-
(2002)
IEDM Tech. Dig.
, pp. 367-370
-
-
Maszara, W.P.1
Krivokapic, Z.2
King, P.3
Gooilgweon, J.-S.4
Lin, M.-R.5
-
8
-
-
0036923594
-
Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
-
J. Kedzierski, E. Nowak, T. Kanarsky, Y. Zhang, D. Boyd, R. Carruthers, C. Cabral, R. Amos, C. Lavoie, R. Roy, J. Newbury, E. Su, J. Benedict, P. Saunders, K. Wong, D. Canaperi, M. Krishnan, K.-L. Lee, B. A. Rainey, D. Fried, P. Cottrell, H. S. Wong, M. Leong, and W. Haensch, "Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation," in IEDM Tech. Dig., 2002, pp. 247-250.
-
(2002)
IEDM Tech. Dig.
, pp. 247-250
-
-
Kedzierski, J.1
Nowak, E.2
Kanarsky, T.3
Zhang, Y.4
Boyd, D.5
Carruthers, R.6
Cabral, C.7
Amos, R.8
Lavoie, C.9
Roy, R.10
Newbury, J.11
Su, E.12
Benedict, J.13
Saunders, P.14
Wong, K.15
Canaperi, D.16
Krishnan, M.17
Lee, K.-L.18
Rainey, B.A.19
Fried, D.20
Cottrell, P.21
Wong, H.S.22
Leong, M.23
Haensch, W.24
more..
-
9
-
-
0001188981
-
Salicidation process using NiSi and its device application
-
F. Deng, R. A. Johnson, P. M. Asbeck, and S. S. Lau, "Salicidation process using NiSi and its device application," J. Appl. Phys., vol. 81, pp. 8047-8051, 1997.
-
(1997)
J. Appl. Phys.
, vol.81
, pp. 8047-8051
-
-
Deng, F.1
Johnson, R.A.2
Asbeck, P.M.3
Lau, S.S.4
-
10
-
-
0001154488
-
Structural investigation of self-aligned silicidation on separation by implantation oxygen
-
F. Deng, K. Ring, Z. F. Guan, S. S. Lau, W. B. Dubbelday, N. Wang, and K. K. Fung, "Structural investigation of self-aligned silicidation on separation by implantation oxygen," J. Appl. Phys., vol. 81, pp. 8040-8046, 1997.
-
(1997)
J. Appl. Phys.
, vol.81
, pp. 8040-8046
-
-
Deng, F.1
Ring, K.2
Guan, Z.F.3
Lau, S.S.4
Dubbelday, W.B.5
Wang, N.6
Fung, K.K.7
-
11
-
-
0000776924
-
Investigation of polycrystalline nickel silicide films as a gate material
-
M. Qin, V. M. C. Poon, and S. C. H. Ho, "Investigation of polycrystalline nickel silicide films as a gate material," J. Electrochem. Soc., vol. 148, no. 5, pp. G271-G274, 2001.
-
(2001)
J. Electrochem. Soc.
, vol.148
, Issue.5
-
-
Qin, M.1
Poon, V.M.C.2
Ho, S.C.H.3
-
12
-
-
0001188528
-
An investigation of surface states at a silicon-silicon oxide interface employing metal-oxide-silicon diodes
-
L. M. Terman, "An investigation of surface states at a silicon-silicon oxide interface employing metal-oxide-silicon diodes," Solid State Electron., vol. 5, pp. 285-299, 1962.
-
(1962)
Solid State Electron.
, vol.5
, pp. 285-299
-
-
Terman, L.M.1
|