Critical dimension control in optical lithography

Microelectronic Engineering

Volumn 69, Issue 2-4, 2003, Pages 452-458

  Postnikov, S ^a   Hector, S ^a   Garza, C ^a   Peters, R ^a   Ivin, V ^b  

^a MOTOROLA INC   (United States)

^b SOFT TEC   (Russian Federation)

Author keywords

Critical dimension control; Error budget; Linewidth variation; Monte Carlo lithography simulation; Optical lithography modeling; Process capability

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT MANUFACTURE; MONTE CARLO METHODS; PHOTOLITHOGRAPHY;

PACKING DENSITY;

MICROELECTRONIC PROCESSING;

EID: 0141791613     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9317(03)00334-4     Document Type: Conference Paper

References (6)

1. Ivin V.V., Larin D.Y., Lucas K.D., Makhviladze T.M., Rogov A.A., Verzunov S.V. Fast modeling of 3D planar resist images for high NA projection lithography. Proc. SPIE. 3051:1997;567-577.
2. Esher G. The importance of mask technical specifications on the lithography error budget, 14th Annual Symposium on Photomask Technology and Management. Proc. SPIE. 2322:1994;409-420.
3. Govil P.K., Tsacoyeanes J., Eron R., Walters D. Contributors to focal plane nonuniformity and their impact on linewidth control in DUV step and scan system. Proc. SPIE. 3334:1998;92-103.
4. Postnikov S.V., Sturtevant J., Lucas K., Fu C.C. CD error budget analysis for 0.18 μm inlaid trench lithography. Proc. SPIE. 3677:1999;395-405.
5. K. Ronse, M. Op de Beek, A. Yen, K. Kim, L. Van den Hove, Characterization and optimization of CD control for 0.25 μm CMOS applications, Proc. SPIE 2726, 555-563.
6. Progler C. Simulation enabled decision making in advanced lithographic manufacturing. Proc. SPIE. 4404:2001.