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Volumn 11, Issue 4, 2003, Pages 701-715

Low-Leakage Asymmetric-Cell SRAM

Author keywords

Asymmetric static random access memory (SRAM) cell; Dual threshold voltage; Leakage current; Static memory

Indexed keywords

ELECTRIC POTENTIAL; LEAKAGE CURRENTS; STABILITY; STATIC RANDOM ACCESS STORAGE;

EID: 0141750607     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2003.816139     Document Type: Article
Times cited : (84)

References (16)
  • 1
    • 0032592096 scopus 로고    scopus 로고
    • Design challenges of technology scaling
    • July-Aug.
    • S. Borkar, "Design challenges of technology scaling," IEEE Micro, vol. 19, pp. 23-29, July-Aug. 1999.
    • (1999) IEEE Micro , vol.19 , pp. 23-29
    • Borkar, S.1
  • 4
    • 84893752029 scopus 로고    scopus 로고
    • Cache decay exploiting generational behavior to reduce leakage power
    • Göteborg, Sweden, July
    • S. Kaxiras, Z. Hu, and M. Martonosi, "Cache decay exploiting generational behavior to reduce leakage power," in Proc. 27th Int. Computer Architecture Symp., Göteborg, Sweden, July 2001.
    • (2001) Proc. 27th Int. Computer Architecture Symp.
    • Kaxiras, S.1    Hu, Z.2    Martonosi, M.3
  • 10
    • 0035308547 scopus 로고    scopus 로고
    • The impact of intrinsic device fluctuations on CMOS SRAM cell stability
    • Apr.
    • A. J. Bhavnagarwala, X. Tang, and J.D.Meindl, "The impact of intrinsic device fluctuations on CMOS SRAM cell stability," IEEE J. Solid-State Circuits, vol. 36, pp. 658-665, Apr. 2001.
    • (2001) IEEE J. Solid-state Circuits , vol.36 , pp. 658-665
    • Bhavnagarwala, A.J.1    Tang, X.2    Meindl, J.D.3
  • 13
    • 0033645215 scopus 로고    scopus 로고
    • MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments
    • July
    • J. M. Musicer and J. Rabaey, "MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments," in Proc, Int. Low Power Electronics and Design Symp., July 2000, pp. 102-107.
    • (2000) Proc, Int. Low Power Electronics and Design Symp. , pp. 102-107
    • Musicer, J.M.1    Rabaey, J.2
  • 15
    • 0029288557 scopus 로고
    • Trends in low-power RAM circuit technologies
    • Apr.
    • K. Itoh, K. Sasaki, and Y. Nakagome, "Trends in low-power RAM circuit technologies," Proc. IEEE, vol. 83, pp. 524-543, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 524-543
    • Itoh, K.1    Sasaki, K.2    Nakagome, Y.3
  • 16
    • 0032136258 scopus 로고    scopus 로고
    • A replica technique for wordline and sense control in low-power SRAMs
    • Aug.
    • B. S. Amrutur and M. A. Horowitz, "A replica technique for wordline and sense control in low-power SRAMs," IEEE J. Solid-State Circuits, vol. 33, pp. 1208-1219, Aug. 1998.
    • (1998) IEEE J. Solid-state Circuits , vol.33 , pp. 1208-1219
    • Amrutur, B.S.1    Horowitz, M.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.