Comparison of low leakage and high speed deep submicron pmosfets submitted to hole injections

IEEE International Integrated Reliability Workshop Final Report

Volumn 2002-January, Issue , 2002, Pages 14-20

  Bravaix, A ^a   Goguenheim, D ^a   Revil, N ^b   Vincent, E ^b  

^a AIX MARSEILLE UNIVERSITÉ   (France)

^b STMICROELECTRONICS   (France)

Author keywords

Charge trapping and interference trap generarim; Hole tunneling in PMOSFETs; Hor Carrier degradation

Indexed keywords

CHARGE INJECTION; CHARGE TRAPPING; ELECTRON INJECTION; GATES (TRANSISTOR);

CARRIER DEGRADATION; CHARGE TRAPPING AND INTERFERENCE TRAP GENERARIM; CHARGE-TRAPPING; HIGH SPEED; HOLE TUNNELING; HOLE TUNNELING IN PMOSFET; HOR-CARRIER DEGRADATION; LOW LEAKAGE; LOW-HIGH; PMOSFET'S;

MOSFET DEVICES;

EID: 0043113557     PISSN: 19308841     EISSN: 23748036     Source Type: Conference Proceeding    
DOI: 10.1109/IRWS.2002.1194225     Document Type: Conference Paper

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