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Volumn , Issue , 2003, Pages 174-180
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A unidirectional bit serial systolic architecture for double-basis division over GF(2m)
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTATIONAL COMPLEXITY;
COMPUTER ARCHITECTURE;
COMPUTER HARDWARE;
COMPUTER SIMULATION;
LOGIC GATES;
POLYNOMIALS;
SYSTOLIC ARCHITECTURES;
CRYPTOGRAPHY;
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EID: 0042635464
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (17)
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