An abstraction algorithm for the verification of level-sensitive latch-based netlists

Formal Methods in System Design

Volumn 23, Issue 1, 2003, Pages 39-65

  Baumgartner, Jason ^a   Heyman, Tamir ^b   Singhal, Vigyan ^c   Aziz, Adnan ^d  

^a IBM   (United States)

^b IBM HAIFA RESEARCH LAB   (Israel)

^c Tempus Fugit Inc   (United States)

^d UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

Automatic abstraction; Bisimulation; CTL model checking; Level sensitive latch; Model reduction; Phase abstraction

Indexed keywords

BOOLEAN ALGEBRA; COMBINATORIAL MATHEMATICS; COMPUTER HARDWARE; COMPUTER SIMULATION; LOGIC DESIGN; SYSTEMS ANALYSIS;

ABSTRACTION ALGORITHMS; BISIMULATION; COMPUTATIONAL CONSTRAINTS; LEVEL-SENSITIVE LATCH; MODEL CHECKING; MODEL REDUCTION; PHASE ABSTRACTION;

ALGORITHMS;

EID: 0042524427     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1024485130001     Document Type: Article

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