Fine-grain conjunction scheduling for symbolic reachability analysis

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2280 LNCS, Issue , 2002, Pages 312-326

  Jin, Hoonsang ^a   Kuehlmann, Andreas ^b   Somenzi, Fabio ^a  

^a UNIVERSITY OF COLORADO   (United States)

^b LAWRENCE BERKELEY NATIONAL LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; MODEL CHECKING;

CLUSTERING TECHNIQUES; HARDWARE VERIFICATION; LINEAR ARRANGEMENTS; PRUNING TECHNIQUES; SCHEDULING PROBLEM; SYMBOLIC MODEL CHECKING; SYMBOLIC REACHABILITY ANALYSIS; TRANSITION RELATIONS;

SCHEDULING;

EID: 84888271406     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46002-0_22     Document Type: Conference Paper

References (18)

1. A. Biere, A. Cimatti, E. Clarke, and Y. Zhu. Symbolic model checking without BDDs. In Fifth International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS'99), pages 193-207, Amsterdam, The Netherlands, March 1999.
2. R. K. Brayton et al. VIS: A system for verification and synthesis. In T. Henzinger and R. Alur, editors, Eighth Conference on Computer Aided Verification (CAV'96), pages 428-432. Springer-Verlag, Rutgers University, 1996. LNCS 1102.
3. R. E. Bryant. Graph-based algorithms for Boolean function manipulation. IEEE Transactions on Computers, C-35(8):677-691, August 1986.
4. J. R. Burch, E. M. Clarke, D. E. Long, K. L. McMillan, and D. L. Dill. Symbolic model checking for sequential circuit verification. IEEE Transactions on Computer-Aided Design, 13(4):401-424, April 1994.
5. 20 states and beyond. In Proceedings of the Fifth Annual Symposium on Logic in Computer Science, pages 428-439, June 1990.
6. G. Cabodi, P. Camurati, and S. Quer. Improved reachability analysis of large finite state machines. In Proceedings of the International Conference on Computer-Aided Design, pages 354-360, Santa Clara, CA, November 1996.
7. A. E. Caldwell, A. B. Kahng, and I. Markov. Optimal partitioners and end-case placers for standard-cell layout. IEEE Transactions on Computer-Aided Design, 19(11):1304-1314, November 2000.
8. P. P. Chauhan, E. M. Clarke, S. Jha, J. Kukula, T. Shiple, H. Veith, and D. Wang. Nonlinear quantification scheduling in image computation. In Proceedings of the International Conference on Computer-Aided Design, pages 293-298, San Jose, CA, November 2001.
9. O. Coudert, C. Berthet, and J. C. Madre. Verification of sequential machines based on symbolic execution. In J. Sifakis, editor, Automatic Verification Methods for Finite State Systems, pages 365-373. Springer-Verlag, 1989. LNCS 407.
10. O. Coudert and J. C. Madre. A unified framework for the formal verification of sequential circuits. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 126-129, November 1990.
11. M. R. Garey, D. S. Johnson, and L. Stockmeyer. Some simplified NP-complete graph problems. Theoretical Computer Science, pages 237-267, 1987.
12. D. Geist and I. Beer. Efficient model checking by automated ordering of transition relation partitions. In D. L. Dill, editor, Sixth Conference on Computer Aided Verification (CAV'94), pages 299-310, Berlin, 1994. Springer-Verlag. LNCS 818.
13. A. Gupta, Z. Yang, L. Zhang, and S. Malik. Partition-based decision heuristics for image computation using SAT and BDDs. In Proceedings of the International Conference on Computer-Aided Design, pages 286-292, San Jose, CA, November 2001.
14. R. Hojati, S. C. Krishnan, and R. K. Brayton. Early quantification and partitioned transition relations. In Proceedings of the International Conference on Computer Design, pages 12-19, Austin, TX, October 1996.
15. I-H. Moon, G. D. Hachtel, and F. Somenzi. Border-block triangular form and conjunction schedule in image computation. In W.A. Hunt, Jr. and S.D. Johnson, editors, Formal Methods in Computer Aided Design, pages 73-90. Springer-Verlag, November 2000. LNCS 1954.
16. I.-H. Moon, J. H. Kukula, K. Ravi, and F. Somenzi. To split or to conjoin: The question in image computation. In Proceedings of the Design Automation Conference, pages 23-28, Los Angeles, CA, June 2000.
17. R. K. Ranjan, A. Aziz, R. K. Brayton, B. F. Plessier, and C. Pixley. Efficient BDD algorithms for FSM synthesis and verification. Presented at IWLS95, Lake Tahoe, CA., May 1995.
18. C. H. West and P. Zafiropulo. Automated validation of a communications protocol: The CCITT X.21 recommendation. IBM Journal of Research and Development, 22:60-71, 1978.