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Volumn 1855, Issue , 2000, Pages 5-19

An abstraction algorithm for the verification of generalized C-slow designs

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTING; COMPUTER AIDED ANALYSIS; FLIP FLOP CIRCUITS; MODEL CHECKING;

EID: 84944413527     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/10722167_5     Document Type: Conference Paper
Times cited : (7)

References (11)
  • 2
    • 33746763910 scopus 로고
    • Retiming Synchronous Circuitry
    • C. E. Leiserson and J. B. Saxe. Retiming Synchronous Circuitry. In Algorithmica, 6(1):5-35, 1991.
    • (1991) Algorithmica , vol.6 , Issue.1 , pp. 5-35
    • Leiserson, C.E.1    Saxe, J.B.2
  • 7
    • 0003830657 scopus 로고
    • Switching and Finite Automata Theory
    • McGraw-Hill Book Company
    • Z. Kohavi. Switching and Finite Automata Theory. Computer Science Series. McGraw-Hill Book Company, 1970.
    • (1970) Computer Science Series
    • Kohavi, Z.1
  • 9
    • 0002367651 scopus 로고
    • Design and Synthesis of Synchronization Ske- letons Using Branching Time Logic
    • E. M. Clarke and E. A. Emerson. Design and Synthesis of Synchronization Ske- letons Using Branching Time Logic. In Proc. Workshop on Logic of Programs, 1981.
    • (1981) Proc. Workshop on Logic of Programs
    • Clarke, E.M.1    Emerson, E.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.