A novel idea: Using DTMOS to suppress FIBL effect in MOSFET with high-k gate dielectrics

Solid-State Electronics

Volumn 47, Issue 10, 2003, Pages 1735-1740

  Wang, Wenping ^a   Huang, Ru ^a   Yang, Shengqi ^a   Zhang, Guoyan ^a   Zhang, Xing ^a   Wang, Yangyuan ^a  

^a PEKING UNIVERSITY   (China)

Author keywords

Dynamic threshold voltage metal oxide semiconductor (DTMOS); Fringing induced barrier lowing (FIBL) effect; High k

Indexed keywords

COMPUTER SIMULATION; DIELECTRIC DEVICES; DOPING (ADDITIVES); ELECTRIC POTENTIAL; GATES (TRANSISTOR);

FRINGING INDUCED BARRIER LOWING (FIBL) EFFECT;

MOSFET DEVICES;

EID: 0041592455     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(03)00154-0     Document Type: Conference Paper

References (10)

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