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Volumn , Issue , 2003, Pages 300-311

Region-based hierarchical operation partitioning for multicluster processors

Author keywords

Clustering; Instruction scheduling; Instruction level parallelism; Multicluster processor; Operation partitioning; Region region based compilation

Indexed keywords

COMPUTER PROGRAMMING LANGUAGES; GRAPH THEORY;

EID: 0038039846     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (44)

References (26)
  • 5
    • 0031999322 scopus 로고    scopus 로고
    • Instruction assignment for clustered VLIW DSP compilers: A new approach
    • Hewlett-Packard Laboratories, Feb.
    • G. Desoli. Instruction assignment for clustered VLIW DSP compilers: A new approach. Technical Report HPL-98-13, Hewlett-Packard Laboratories, Feb. 1998.
    • (1998) Technical Report , vol.HPL-98-13
    • Desoli, G.1
  • 7
    • 0032315967 scopus 로고    scopus 로고
    • Clustered instruction-level parallel processors
    • Hewlett-Packard Laboratories, Dec.
    • P. Faraboschi, G. Desoli, and J. Fisher. Clustered instruction-level parallel processors. Technical Report HPL-98-204, Hewlett-Packard Laboratories, Dec. 1998.
    • (1998) Technical Report , vol.HPL-98-204
    • Faraboschi, P.1    Desoli, G.2    Fisher, J.3
  • 21
    • 0027592731 scopus 로고
    • The multiflow trace scheduling compiler
    • P. Lowney et al. The Multiflow Trace Scheduling compiler. The Journal of Supercomputing, 7(1-2):51-142, 1993.
    • (1993) The Journal of Supercomputing , vol.7 , Issue.1-2 , pp. 51-142
    • Lowney, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.