Exploiting pseudo-schedules to guide data dependence graph partitioning

Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT

Volumn 2002-January, Issue , 2002, Pages 281-290

  Aleta A ^a   Codina, J M ^a   Sanchez J ^a,b   Gonzalez A ^a,b   Kaeli, D ^c  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b INTEL CORPORATION   (United States)

^c NORTHEASTERN UNIVERSITY   (United States)

Author keywords

Clustering algorithms; Computer architecture; Delay; Floating point arithmetic; Microarchitecture; Partitioning algorithms; Processor scheduling; Registers; Scheduling algorithm; VLIW

Indexed keywords

ALGORITHMS; CLUSTER COMPUTING; COMPUTER ARCHITECTURE; DIGITAL ARITHMETIC; GRAPH THEORY; PARALLEL ARCHITECTURES; PROGRAM PROCESSORS; SCHEDULING; SCHEDULING ALGORITHMS; VERY LONG INSTRUCTION WORD ARCHITECTURE;

DELAY; MICRO ARCHITECTURES; PARTITIONING ALGORITHMS; PROCESSOR SCHEDULING; REGISTERS; VLIW;

CLUSTERING ALGORITHMS;

EID: 84948774920     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2002.1106027     Document Type: Conference Paper

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