-
1
-
-
0035685313
-
CIXOB-k: Combined input-cross-point-output buffered packet switch
-
IEEE Press
-
R. Rojas-Cessa, E. Oki, and H. Jonathan Chao, "CIXOB-k: Combined Input-Cross-point-Output Buffered Packet Switch," Proc. IEEE Globecom 01, vol. 4, IEEE Press, 2001, pp. 2654-2660.
-
(2001)
Proc. IEEE Globecom 01
, vol.4
, pp. 2654-2660
-
-
Rojas-Cessa, R.1
Oki, E.2
Jonathan Chao, H.3
-
3
-
-
0012395279
-
Current issues in packet switch design
-
HotNets-I 2002-First Workshop on Hot Topics in Networks, Jan.
-
C. Minkenberg et al., "Current Issues in Packet Switch Design," HotNets-I 2002-First Workshop on Hot Topics in Networks, to be published in ACM SigComm Computer Comm. Rev., vol. 33, no. 1, Jan. 2003.
-
(2003)
ACM SigComm Computer Comm. Rev.
, vol.33
, Issue.1
-
-
Minkenberg, C.1
-
4
-
-
0032655137
-
The iSLIP scheduling algorithm for input-queued switches
-
Apr.
-
N. McKeown, "The iSLIP Scheduling Algorithm for Input-Queued Switches," IEEE/ACM Trans. Networking, vol. 7, no. 2, Apr. 1999, pp. 188-201.
-
(1999)
IEEE/ACM Trans. Networking
, vol.7
, Issue.2
, pp. 188-201
-
-
McKeown, N.1
-
5
-
-
0032689483
-
Matching output queuing with a combined input output queued switch
-
June
-
S-T. Chuang et al., "Matching Output Queuing with a Combined Input Output Queued Switch," IEEE J. Selected Areas of Comm., vol. 17, no. 6, June 1999, pp. 1030-1039.
-
(1999)
IEEE J. Selected Areas of Comm.
, vol.17
, Issue.6
, pp. 1030-1039
-
-
Chuang, S.-T.1
-
6
-
-
0032673103
-
On the speedup required for work-conserving crossbar switches
-
June
-
P. Krishna et al., "On the Speedup Required for Work-Conserving Crossbar Switches," IEEE J. Selected Areas of Comm., vol. 17, no. 6, June 1999, pp. 1057-1066.
-
(1999)
IEEE J. Selected Areas of Comm.
, vol.17
, Issue.6
, pp. 1057-1066
-
-
Krishna, P.1
-
7
-
-
0031361825
-
Switching fabrics with internal back-pressure using the ATLAS I single-chip ATM switch
-
IEEE Press
-
M. Katevenis, D. Serpanos, and E. Spyridakis, "Switching Fabrics with Internal Back-pressure Using the ATLAS I Single-chip ATM Switch," Proc. IEEE Globecom 97, IEEE Press, 1997, pp. 242-246.
-
(1997)
Proc. IEEE Globecom 97
, pp. 242-246
-
-
Katevenis, M.1
Serpanos, D.2
Spyridakis, E.3
-
8
-
-
0031337497
-
Low-cost scalable switching solution for broadband networking: The ATLANTA architecture and chipset
-
Dec.
-
F.M. Chiussi, J.G. Kneuer, and V.P. Kumar, "Low-Cost Scalable Switching Solution for Broadband Networking: The ATLANTA Architecture and Chipset," IEEE Comm. Magazine, vol. 35, Dec. 1997, pp. 44-53.
-
(1997)
IEEE Comm. Magazine
, vol.35
, pp. 44-53
-
-
Chiussi, F.M.1
Kneuer, J.G.2
Kumar, V.P.3
-
9
-
-
0034499316
-
A combined input and output queued packet-switched system based on PRIZMA switch-on-a-chip technology
-
Dec.
-
C. Minkenberg and T. Engbersen, "A Combined Input and Output Queued Packet-switched System Based on PRIZMA Switch-on-a-Chip Technology," IEEE Comm. Magazine, vol. 38, Dec. 2000, pp. 70-77.
-
(2000)
IEEE Comm. Magazine
, vol.38
, pp. 70-77
-
-
Minkenberg, C.1
Engbersen, T.2
-
10
-
-
0012392776
-
Optimized architecture and design of an output-queued CMOS switch chip
-
IEEE CS Press
-
R.P. Luijten et al., "Optimized Architecture and Design of an Output-Queued CMOS Switch Chip," Proc. 10th Int'l Conf. Computer Communications and Networks, IEEE CS Press, 2001, pp. 448-453.
-
(2001)
Proc. 10th Int'l Conf. Computer Communications and Networks
, pp. 448-453
-
-
Luijten, R.P.1
-
11
-
-
0031648315
-
Implementing distributed packet fair queuing in a scalable switch architecture
-
IEEE Press
-
D.C. Stephens and H. Zhang, "Implementing Distributed Packet Fair Queuing in a Scalable Switch Architecture," Proc. IEEE Infocom 98, vol. 1, IEEE Press, 1998, pp. 282-290.
-
(1998)
Proc. IEEE Infocom 98
, vol.1
, pp. 282-290
-
-
Stephens, D.C.1
Zhang, H.2
-
12
-
-
0034156774
-
Performance evaluation of a combined input- and crosspoint-queued switch
-
Mar.
-
M. Nabeshima, "Performance Evaluation of a Combined Input- and Crosspoint-Queued Switch," IEICE Trans. Communications, vol. E83-B, no. 3, Mar. 2000, pp. 737-741.
-
(2000)
IEICE Trans. Communications
, vol.E83-B
, Issue.3
, pp. 737-741
-
-
Nabeshima, M.1
-
13
-
-
0034851966
-
A high-throughput scheduling algorithm for a buffered crossbar switch fabric
-
IEEE Press
-
T. Javidi, R. Magill, and T. Hrabik, "A High-Throughput Scheduling Algorithm for a Buffered Crossbar Switch Fabric," Proc. IEEE Int'l Conf. Communications, vol. 5, IEEE Press, 2001, pp. 1586-1591.
-
(2001)
Proc. IEEE Int'l Conf. Communications
, vol.5
, pp. 1586-1591
-
-
Javidi, T.1
Magill, R.2
Hrabik, T.3
-
14
-
-
85176425027
-
16×16 limited intermediate buffer switch module for ATM networks
-
IEEE Press
-
A.K. Gupta, L. Orozco Barbosa, and N.D. Georganas, "16×16 Limited Intermediate Buffer Switch Module for ATM Networks," Proc. IEEE Globecom 91, IEEE Press, 1991, pp. 939-943.
-
(1991)
Proc. IEEE Globecom 91
, pp. 939-943
-
-
Gupta, A.K.1
Orozco Barbosa, L.2
Georganas, N.D.3
-
15
-
-
0027562052
-
A high-speed ATM switch with input and cross-point buffers
-
Mar.
-
Y. Doi and N. Yamanaka, "A High-Speed ATM Switch with Input and Cross-Point Buffers," IEICE Trans. Communications, vol. E76-B, no. 3, Mar. 1993, pp. 310-314.
-
(1993)
IEICE Trans. Communications
, vol.E76-B
, Issue.3
, pp. 310-314
-
-
Doi, Y.1
Yamanaka, N.2
-
16
-
-
0038521345
-
Stability degree of switches with finite buffers under non-negligible RTT
-
Elsevier Press, to be published
-
M. Gusat et al., "Stability Degree of Switches with Finite Buffers under Non-Negligible RTT," Microprocessor and Microsystems J., Elsevier Press, to be published 2003.
-
(2003)
Microprocessor and Microsystems J.
-
-
Gusat, M.1
|