Reduction design for generic universal switch blocks

ACM Transactions on Design Automation of Electronic Systems

Volumn 7, Issue 4, 2002, Pages 526-546

  Fan, Hongbing ^a   Liu, Jiping ^b   Wu, Yu Liang ^c   Wong, C K ^c  

^a UNIVERSITY OF VICTORIA   (Canada)

^b UNIVERSITY OF LETHBRIDGE   (Canada)

^c CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

Decomposition; FPGA architecture design; Routing; Routing requirement; Switch module; Universal switch block

Indexed keywords

ALGORITHMS; ELECTRIC SWITCHES; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS;

UNIVERSAL SWITCHES;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036826842     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/605440.605443     Document Type: Article

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