Comment on "generic universal switch blocks"

IEEE Transactions on Computers

Volumn 51, Issue 1, 2002, Pages 93-95

  Fan, Hongbing ^b   Wu, Yu Liang ^a,c   Chang, Yao Wen ^a,d  

^a IEEE   (Hong Kong)

^b UNIVERSITY OF VICTORIA   (Canada)

^c CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

^d NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Field programmable gate array; FPGA routing; Universal switch block design

Indexed keywords

GLOBAL ROUTING; HYPERGRAPH; ROUTING REQUIREMENT VECTOR; UNIVERSAL SWITCH BLOCKS;

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS; GRAPH THEORY; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; SET THEORY; VECTORS;

LOGIC DESIGN;

EID: 0036158432     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.980020     Document Type: Note

References (5)

1. 3-dimensional switch box
2. Universal switch models for FPGA
3. General models for optimum arbitrary-dimension FPGA switch box designs
4. Generic universal switch blocks