Interconnection optimization in data path allocation using minimal cost maximal flow algorithm

Microelectronics Journal

Volumn 33, Issue 9, 2002, Pages 749-759

  Zhu, H W ^a   Jong, C C ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Data path allocation; Flow network; High level synthesis; Interconnection optimization; Layout area estimation

Indexed keywords

ALGORITHMS; DATA REDUCTION; INTERCONNECTION NETWORKS; OPTIMIZATION;

DATA PATH ALLOCATION;

VLSI CIRCUITS;

EID: 0036722908     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(02)00048-4     Document Type: Conference Paper

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