Modeling, measurement, and simulation of simultaneous switching noise

IEEE Transactions on Components Packaging and Manufacturing Technology Part B

Volumn 19, Issue 3, 1996, Pages 461-472

  McCredie, Bradley D ^a,b   Becker, Wiren D ^a,b  

^a IEEE

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC VARIABLES MEASUREMENT; MULTILAYERS; POWER SUPPLY CIRCUITS; SEMICONDUCTOR DEVICE MODELS; SWITCHING CIRCUITS; SYSTEMS ANALYSIS;

MULTILAYERED CERAMIC SUBSTRATE; OFF CHIP DRIVERS; POWER DISTRIBUTION; SWITCHING NOISE;

SPURIOUS SIGNAL NOISE;

EID: 0030216363     PISSN: 10709894     EISSN: None     Source Type: Journal    
DOI: 10.1109/96.533884     Document Type: Article

References (9)

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8. K. Ito, K. Kato, N. Hirano, and T. Sudo, "Experimental characterization of simultaneous switching noise for multichip modules," in Proc. 1995 IEEE MCM Conf., 1985, pp. 217-220.
9. P. A. Brennan, N. Raver, and A. E. Ruehli, "Three-dimensional inductance computations with partial element equivalent circuits," IBM J. Res. Dev., vol. 23, no. 6, pp. 661-668, Nov. 1979.