A novel elevated source/drain PMOSFET formed by Ge-B/Si intermixing

IEEE Electron Device Letters

Volumn 23, Issue 4, 2002, Pages 218-220

  Ranade, Pushkar ^a,b   Takeuchi, Hideki ^a,c   Subramanian, Vivek ^a,c   King, Tsu Jae ^a,c  

^a IEEE   (United States)

^b University of California Berkeley   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Boron diffusion; Elevated source drain MOSFET; Silicon germanium; Ultra shallow junctions

Indexed keywords

STRAIN RELAXATION; ULTRA SHALLOW JUNCTIONS;

CHEMICAL VAPOR DEPOSITION; ION IMPLANTATION; RAPID THERMAL ANNEALING; SEMICONDUCTING GERMANIUM; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS; STRAIN RATE;

MOSFET DEVICES;

EID: 0036540913     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.992844     Document Type: Article

References (9)

1. Low thermal budget elevated source/drain technology utilizing novel solid phase epitaxy and selective vapor phase etching
2. Short channel characteristics of quasisingle-drain MOSFETs
3. Low temperature (≤800°C) recessed junction selective silicon-germanium source/drain technology for sub-70 nm CMOS
4. Ultrashallow p+/n junctions formed by diffusion from an RTCVD-deposited B: Ge layer
5. Observation of dopant mediated intermixing at Ge/Si interface
6. Diffusion in silicon
7. 100 nm gate length high performance/low power CMOS transistor structure
8. Ultra-low contact resistance for deca-nm MOSFETs by laser annealing