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Volumn 20, Issue 2, 2002, Pages 139-158

Formal verification of out-of-order execution with incremental flushing

Author keywords

Abstraction; Formal verification; Incremental flushing; Microprocessor; Out of order execution; Self consistency; Theorem proving; Validity checking

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER AIDED LOGIC DESIGN; FORMAL LOGIC; MICROPROCESSOR CHIPS; REDUCED INSTRUCTION SET COMPUTING; THEOREM PROVING;

EID: 0036500362     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1014118529369     Document Type: Article
Times cited : (6)

References (22)
  • 8
    • 0008665713 scopus 로고    scopus 로고
    • You assume, we guarantee: Methodology and case studies
    • Technical report, Electronics Research Laboratory, University of California, Berkeley
    • (1998)
    • Henzinger, T.A.1    Qadeer, S.2    Rajamani, S.K.3
  • 11
    • 25544475064 scopus 로고    scopus 로고
    • Applications of symbolic simulation to the formal verification of microprocessors
    • Ph.D. thesis, Department of Electrical Engineering, Stanford University, August
    • (1999)
    • Jones, R.B.1
  • 17
    • 0008648148 scopus 로고    scopus 로고
    • Formal verification of an advanced pipelined machine
    • Ph.D. thesis, Computer Science Department, University of Texas at Austin, Dec.
    • (1999)
    • Sawada, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.