Front-end CMOS chipset for 10 Gb/s communication

IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers

Volumn , Issue , 2002, Pages 93-96

  Petersen, Anders K ^a   Kiziloǧlu, Kürşad ^a   Yoon, Ty ^a   Williams Jr , Freddie ^a   Sandor, Martin R ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); BANDWIDTH; BIT ERROR RATE; ELECTRIC IMPEDANCE; OPTICAL COMMUNICATION; SENSITIVITY ANALYSIS;

TRANSIMPEDANCE AMPLIFIERS;

CMOS INTEGRATED CIRCUITS;

EID: 0036312864     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. A fully integrated SiGe receiver IC for 10 GB/s data rate
2. A 0.6-W 10-Gb/s SONET/SDH bit-error-rate monitoring LSI
3. InP-based monolithically integrated photoreceivers
4. Highly integrated InP HBT optical receivers
5. A redundant multi-valued logic for 10 Gb/s CMOS demultiplexer IC
6. A 28.5 GB/s CMOS non-blocking router for terabits/s connectivity between multiple processors and peripheral I/O nodes
7. A single chip 3.5 Gb/s CMOS/SIMOX transceiver with automatic-gain-control and automatic-power-control circuits
8. Front-end CMOS chipset for fiber-based gigabit ethernet
9. Compact low-voltage power-efficient operational amplifier cells for VLSI
10. 622 MB/s CMOS limiting amplifier with 40 dB dynamic range
11. A CMOS laser driver for 10 Gb/s communication