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Volumn 4562 II, Issue , 2001, Pages 954-967

Challenge for sub-100-nm DRAM gate printing using ArF lithography with combination of moderate OAI and attPSM

Author keywords

100 nm node; ArF; Attenuated PSM; Mask error; MEEF; Off axis illumination; Resolution enhancement

Indexed keywords

ARGON; COMPUTER SIMULATION; DYNAMIC RANDOM ACCESS STORAGE; ERROR ANALYSIS; LIGHT TRANSMISSION; PHOTOLITHOGRAPHY; SILICON WAFERS;

EID: 0035767844     PISSN: 0277786X     EISSN: None     Source Type: Journal    
DOI: 10.1117/12.458259     Document Type: Article
Times cited : (5)

References (10)
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  • 2
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  • 3
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    • Kachwala, N.1
  • 4
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  • 6
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  • 7
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    • Patterning 220-nm pitch DRAM patterns by using double mask exposure
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  • 8
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  • 10
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.