Performance characterization of a hardware mechanism for dynamic optimization

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 2001, Pages 16-27

  Fahs, Brian ^a   Bose, Satarupa ^a   Crum, Matthew ^a   Slechta, Brian ^a   Spadini, Francesco ^a   Tung, Tony ^a   Patel, Sanjay J ^a   Lumetta, Steven S ^a  

^a University of Illinois at Urbana Champaign   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER HARDWARE; OPTIMIZATION; PROGRAM PROCESSORS;

DYNAMIC OPTIMIZATION;

COMPUTER ARCHITECTURE;

EID: 0035694429     PISSN: 10724451     EISSN: None     Source Type: Journal    
DOI: 10.1109/MICRO.2001.991102     Document Type: Article

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