Modeling and testing the Gekko microprocessor, an IBM PowerPC derivative for Nintendo

IEEE International Test Conference (TC)

Volumn , Issue , 2001, Pages 593-599

  Vandling, Gilbert ^a  

^a NONE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; DESIGN FOR TESTABILITY; DIGITAL CIRCUITS; LOGIC DEVICES; PERSONAL COMPUTERS;

MEMORY CIRCUITS;

MICROPROCESSOR CHIPS;

EID: 0035687176     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEST.2001.966678     Document Type: Article

References (14)

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10. Test generation based on high level assertion specification for powerPC microprocessor embedded arrays
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13. GateMaker: A transistor to gate level model extractor for simulation, automatic test pattern generation, and verification
14. Limitations in predicting defect level based on stuck-at fault coverage