Quad DCVS dynamic logic fault modeling and testing

IEEE International Test Conference (TC)

Volumn , Issue , 1998, Pages 356-362

  Adams, R Dean ^a   Cooley, Edmond S ^a   Hansen, Patrick R ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC SWITCHES; FAILURE ANALYSIS; LOGIC CIRCUITS; LOGIC GATES; MATHEMATICAL MODELS;

DYNAMIC LOGIC; QUAD DIFFERENTIAL CASCODE VOLTAGE SWITCHES (DCVS);

COMPUTER AIDED LOGIC DESIGN;

EID: 0032311587     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)