Device simulation of a n-DMOS cell with trench isolation

Microelectronics Journal

Volumn 32, Issue 1, 2001, Pages 75-80

  Kamoulakos, G ^a   Haniotakis, Th ^a   Tsiatouhas, Y ^a   Schoellkopf, J P ^b   Arapoyanni, A ^c  

^a Integrated Systems Development SA   (Greece)

^b STMICROELECTRONICS   (France)

^c Univ A   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POTENTIAL; GATES (TRANSISTOR); MASKS; SEMICONDUCTOR DEVICE MANUFACTURE;

DRIFT METAL OXIDE SEMICONDUCTOR (DMOS) DEVICES;

MOSFET DEVICES;

EID: 0035192695     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2692(00)00108-7     Document Type: Article

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