Plasma-assisted wafer de-chucking (power-lift) process induced charging damage

International Symposium on Plasma Process-Induced Damage, P2ID, Proceedings

Volumn , Issue , 2001, Pages 25-28

  Cheung, K P ^a   Steiner, K G ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; DIELECTRIC FILMS; DIELECTRIC MATERIALS; GATES (TRANSISTOR); HIGH PRESSURE EFFECTS; PLASMA APPLICATIONS; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION;

DIELECTRIC DEPOSITION;

SILICON WAFERS;

EID: 0034827295     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

1. Gate oxide charging and its elimination for metal antenna capacitor and transistor in VLSI CMOS double layer metal technology
2. Passivation-layer charge-induced failure mechanism in 0.5um CMOS technology
3. Gate dielectric integrity and reliability in 0.5-um CMOS technology
4. Plasma-induced gate-oxide charging issues for sub-0.5um complementary metal-oxide-semiconductor technologies
5. Charging damage from plasma enhanced TEOS deposition
6. Low temperature chemical vapor deposition processes and dielectrics for microelectronic circuit manufacturing at IBM
7. Charge build-up reduction during biased electron cyclotron resonance plasma deposition
8. Control of plasma damage to gate oxide during high density plasma chemical vapor deposition
9. Assessment of charge-induced damage from high density plasma (HDP) oxide deposition
10. Is n-MOSFET hot-carrier lifetime degraded by charging damage?
11. Impact of plasma-charging damage polarity on MOSFET noise
12. Antenna device reliability for ULSI processing
13. Process-induced gate oxide damage issues in advanced plasma chemical vapor deposition processes
14. On the mechanism of plasma enhanced dielectric deposition charging damage
15. Direct experimental determination and modeling of VUV induced bulk conduction in dielectrics during plasma processing