Reliability assessment of microvias in HDI printed circuit boards

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2001, Pages 1159-1163

  Liu, F ^a   Lu, J ^a   Sundaram, V ^a   Sutter, D ^a   White, G ^a   Baldwin, D ^a   Tummala, R R ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; CHIP SCALE PACKAGES; ELECTRONICS PACKAGING; FLIP CHIP DEVICES; PRINTED CIRCUIT BOARDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SUBSTRATES; THERMAL EFFECTS;

HIGH DENSITY INTERCONNECT STRUCTURES; MICROVIAS RELIABILITY ASSESSMENT; THERMAL SHOCK TESTING;

DESIGN FOR TESTABILITY;

EID: 0034822321     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

1. SOP: The microelectronics for the 21st century with integral passive integration
2. Ultra fine line HDI technology at Georgia tech PRC
3. Comparison of various microvia technology
4. An overview of microvia technology
5. High performance photo-sensitive insulating materials for high density multi-layer wiring board
6. Photovia technology: Some important aspects for reliability
7. A two-layer high density printed circuit board and its reliability
8. Microvias. The hole story, part II. Three competing technologies: Which one for you?
9. Cure kinetics modeling of ViaLux™ 81: A novel epoxy photo-dielectric dry film for microvia applications