Efficient VLSI architectures for fast computation of the discrete Fourier transform and its inverse

IEEE Transactions on Signal Processing

Volumn 48, Issue 11, 2000, Pages 3206-3216

  Chang, Ching Hsien ^a   Wang, Chin Liang ^a   Chang, Yu Tai ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; CMOS INTEGRATED CIRCUITS; DISCRETE FOURIER TRANSFORMS; FAST FOURIER TRANSFORMS; MATRIX ALGEBRA; MULTIPLYING CIRCUITS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; ROM; SYSTOLIC ARRAYS; VLSI CIRCUITS;

ASYMMETRIC DIGITAL SUBSCRIBER LINES; INVERSE DISCRETE FOURIER TRANSFORM;

DIGITAL SIGNAL PROCESSING;

EID: 0034324584     PISSN: 1053587X     EISSN: None     Source Type: Journal    
DOI: 10.1109/78.875476     Document Type: Article

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