A VLSI Constant Geometry Architecture for the Fast Hartley and Fourier Transforms

IEEE Transactions on Parallel and Distributed Systems

Volumn 3, Issue 1, 1992, Pages 58-70

  Zapata, Emilio L ^a   Arguello, F ^a  

^a UNIVERSITY OF SANTIAGO DE COMPOSTELA   (Spain)

Author keywords

Constant geometry algorithm; fast Fourier transform; fast Hartley transform; parallel architecture; semisystolic system; VLSI technology

Indexed keywords

INTEGRATED CIRCUITS, VLSI--DESIGN; MATHEMATICAL TRANSFORMATIONS--FAST FOURIER TRANSFORMS;

FAST HARTLEY TRANSFORMS;

COMPUTER ARCHITECTURE;

EID: 0026679591     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.113082     Document Type: Article

References (46)

1. J.I. Agbinya, “Fast interpolation algorithm using fast Hartley transform,” Proc. IEEE, vol. 75, no. 4, pp. 523–524, 1987.
2. R.D. Albon, G.E. Floyd, and J. E. Coles, “A mask programmable DSP array,” in Proc. IEEE Int. Conf Custom Integrated Circuits, IEEE Press, New York, 1989, pp. 2011–2013.
3. R. N. Bracewell, “The discrete Hartley transform,” J. Opt. Soc. Amer., vol. 73, no. 12, pp. 1832–1835, 1983.
4. R. N. Bracewell, “The fast Hartley transform,” Proc. IEEE, vol. 72, no. 8, pp. 1010–1018, 1984.
5. R. N. Bracewell, O. Buneman, H. Hao, and J. Villasenor, “Fast two-dimensional Hartley transform,” Proc. IEEE, vol. 74, no. 9, pp. 1282–1283, 1986.
6. R. N. Bracewell, The Fast Hartley Transform. New York: Oxford University Press, 1986.
7. R.N. Bracewell, H. Bartelt, A. W. Lohmann, and N. Streibl, “Optical synthesis of the Hartley transform,” Appl. Opt., vol. 24, no. 8, pp. 1401–1402, 1985.
8. G.E.J. Bold, “A comparison of the time involved in computing fast Hartley and fast Fourier transforms,” Proc. IEEE, vol. 73, no. 12, pp. 1863–1864, 1985.
9. S. Boussakta and A. G.J. Holt, “Calculation of the discrete Hartley transform via the Fermat number transform using a VLSI chip,” IEE Proc., pt. G, vol. 135, no. 3, pp. 101–103, 1988.
10. S. Boussakta and A. G.J. Holt, “Fast multidimensional discrete Hartley transform using Fermat number transform,” IEE Proc., pt. G, vol. 135, no. 6, pp. 253–257, 1988.
11. S. Boussakta and A. G.J. Holt, “Proposed prime number Hartley transform implementation using transversal filter structures,” Electron. Lett., vol. 24, no. 15, pp. 926–928, 1988.
12. S. Boussakta and A. G.J. Holt, “Prime-factor Hartley and Hartley-like transform calculation using transversal filter-type structures,” IEE Proc., pt. G, vol. 136, no. 5, pp. 269–277, 1989.
13. O. Buneman, “In-situ bit reversed ordering for Hartley transforms,” IEEE Trans. Acoust., Speech, Signal Processing, vol. 37, no. 4, pp. 577–580, 1989.
14. F. Catthoor and H. J. De Man, “Application-specific architectural methodologies for high throughput digital signal and image processing,” IEEE Trans. Acoust., Speech, Signal Processing, vol. 38, no. 2, pp. 339–349, 1990.
15. C. Chakrabarti and J. JaJa, “Optimal systolic designs for computing DHT and DCT,” in VLSI Signal Processing, III, Monterey, CA (New York, IEEE Press), 1988, pp. 411–422.
16. J. W. Cooley and J. W. Tukey, “An algorithm for the machine calculation of complex Fourier series,” Math. Comput., vol. 19, pp. 297–301, 1965.
17. D. M. Cottrell, R.A. Lilly, J.A. Davis, and T. Day, “Optical correlator performance of binary phase-only filters using Fourier and Hartley transforms,” Appl. Opt., vol. 26, no. 18, pp. 3755–3761, 1987.
18. P. Denyer and D. Renshaw, VLSI Signal Processing: A Bit-Serial Approach. Reading, MA: Addison-Wesley, 1985.
19. A. Drygajlo, “An application of the fast Hartley transform to digital spectral filtering,” in Proc. European Conf. Circuits Theory and Design 87, Paris, 1987, pp. 263–268.
20. P. Duhamel and M. Vetterli, “Improved Fourier and Hartley transform algorithms: Application to cyclic convolution of real data,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-35, no. 6, pp. 818–824, 1987.
21. R. D. Fellman, “Design issues and an architecture for the monolithic implementation of a parallel digital signal processor,” IEEE Trans. Acoust., Speech, Signal Processing, vol. 38, no. 5, pp. 839–852, 1990.
22. R. D. Fellman, R. T. Kaneshiro, and K. Konstantinides, “Design and evaluation of architecture for a digital signal processor for instrumentation applications,” IEEE Trans. Acoust., Speech, Signal Processing, vol. 38, no. 3, pp. 537–546, 1990.
23. S. Gomez, S. Gonzalez, D. D. Hsu, and A. E. H. Kuo, “An application-specific FFT processor,” Electron. Eng., vol. 60, no. 738, pp. 99–106, 1988.
24. H. Hao and R. N. Bracewell, “A three-dimensional DFT algorithm using the fast Hartley transform,” Proc. IEEE, vol. 75, no. 2, pp. 264–266, 1987.
25. R. V. L. Hartley, “A more symmetrical Fourier analysis applied to transmission problems,” Proc. IRE, vol. 30, pp. 142–150, 1942.
26. B. Holland and J. Mather, “Monolithic frequency domain processing with 450 MFLOPS throughput,” Electron. Eng., vol. 61, no. 752, pp. 29–36, 1989.
27. B. Holland, J. Mather, and S. Brightfield, “Fourier chip tackles transforms,” ESD: The Electronic Syst. Design Mag., pp. 30–36, July 1989.
28. H. S. Hou, “The fast Hartley transform algorithm,” IEEE Trans. Comput., vol. C-36, no. 2, pp. 147–156, 1987.
29. H.T. Kung, “Why systolic architectures?,” IEEE Comput. Mag., vol. 15, no. 1, pp. 37–46, 1982.
30. H. T. Kung and C. E. Leiserson, “Systolic arrays for VLSI,” in Sparse Matrix Proc. 1978, I. S. Duff and G. W. Steward, Eds., Soc. Indust. Appl. Math., 1979, pp. 256–282.
31. S.Y. Kung, VLSI Array Processors. Englewood Cliffs, NJ: Prentice-Hall, 1988.
32. E. A. Lee, “Programmable DSP architectures: Part I,” IEEE ASSP Mag., vol. 5, no. 4, pp. 4–19, 1988.
33. E. A. Lee, “Programmable DSP architectures: Part II,” IEEE ASSP Mag., vol. 6, no. 3, pp. 4–14, 1989.
34. Y. Li and G. Eichmann, “Coherent optical generation of Hartley transform of real images,” Opt. Commun., vol. 56, no. 3, pp. 150–154, 1985.
35. M. Marchesi, G. Orlandi, and F. Piazza, “A systolic circuit for fast Hartley transform,” in Proc. IEEE Conf. Circuits Syst., Helsinki, 1988, pp. 2685–2688.
36. B. C. McKinney and F. El-Guibaly, “VLSI design of an FFT processor network,” Integration, VLSI J., vol. 8, no. 3, pp. 301–320, 1989.
37. R. P. Millane, “Image reconstruction from the Hartley transform intensity,” Opt. Commun., vol. 60, no. 5, pp. 269–274, 1986.
38. M. A. O'Neill, “Faster than fast Fourier,” Byte, no. 4, pp. 293-300,1988.
39. C. H. Paik and M. D. Fox, “Fast Hartley transform for image processing,” IEEE Trans. Med Imaging, vol. 7, no. 2, pp. 149–153, 1988.
40. L. R. Rabiner and B. Gold, Theory and Application of Digital Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1975.
41. H. V. Sorensen, D.L. Jones, C. S. Burrus, and M.T. Heideman, “On computing the discrete Hartley transform,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-33, no. 4, pp. 1231–1238, 1985.
42. H. V. Sorensen, D.L. Jones, M.T. Heideman, and C. S. Burrus, “Real-valued fast Fourier transform algorithms,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-35, no. 6, pp. 849–863, 1987.
43. M. C. Steckner and D. J. Drost, “Fast cepstrum analysis using the Hartley transform,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-37, no. 8, pp. 1300–1302, 1989.
44. P. N. Swarztrauber, “Multiprocessor FFT's,” Parallel Comput., vol. 5, pp. 197–210, 1987.
45. B. V. K. Vijaya Kumar, “Geometric moments computed from the Hartley transform,” Opt. Eng., vol. 25, no. 7, pp. 1327–1336, 1986.
46. E. L. Zapata, F. Arguello, F. F. Rivera, and J. D. Bruguera, “Multidimensional fast Hartley transform into SIMD hypercubes,” Microprocessing and Microprogramming, vol. 29, no. 2, pp. 121–134, 1990.