A high-speed conditional carry select (CCS) adder circuit with a successively incremented carry number block (SICNB) structure for low-voltage VLSI implementation

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 47, Issue 10, 2000, Pages 1074-1079

  Huang, Yen Mou ^a   Kuo, James B ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Carry select adders; High speed; Low voltage; Multipliers

Indexed keywords

CONDITIONAL CARRY SELECT ADDER CIRCUIT; SUCCESSIVELY INCREMENTED CARRY NUMBER BLOCK STRUCTURE;

COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC WAVEFORMS; GATES (TRANSISTOR); LOGIC CIRCUITS; LOGIC DESIGN; MOS DEVICES; VLSI CIRCUITS;

ADDERS;

EID: 0034292708     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.877148     Document Type: Article

References (9)

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