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Volumn 1, Issue , 1998, Pages 168-175

Process scheduling for performance estimation and synthesis of hardware/software systems

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS; FLOW GRAPHS; OPTIMIZATION;

EID: 85015544501     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.1998.711792     Document Type: Conference Paper
Times cited : (7)

References (15)
  • 2
    • 0029216608 scopus 로고
    • Interval Scheduling: Fine-Grained Code Scheduling for Embedded Systems
    • P. Chou, G. Boriello, "Interval Scheduling: Fine-Grained Code Scheduling for Embedded Systems", Proc. DAC, 1995, 462-467.
    • (1995) Proc. DAC , pp. 462-467
    • Chou, P.1    Boriello, G.2
  • 3
    • 0015482117 scopus 로고
    • Optimal Scheduling for two Processor Systems
    • E.G. Coffman Jr., R.L. Graham, "Optimal Scheduling for two Processor Systems", Acta Informatica, 1, 1972, 200-213.
    • (1972) Acta Informatica , vol.1 , pp. 200-213
    • Coffman, E.G.1    Graham, R.L.2
  • 5
    • 0030784055 scopus 로고    scopus 로고
    • System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search
    • P. Eles, Z. Peng, K. Kuchcinski, A. Doboli, "System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search", Des. Autom. for Emb. Syst., V2, 1, 1997, 5-32.
    • (1997) Des. Autom. for Emb. Syst , vol.2 , Issue.1 , pp. 5-32
    • Eles, P.1    Peng, Z.2    Kuchcinski, K.3    Doboli, A.4
  • 8
    • 0029779451 scopus 로고    scopus 로고
    • A Co-Synthesis Approach to Embedded System Design Automation
    • R. K. Gupta, G. De Micheli, "A Co-Synthesis Approach to Embedded System Design Automation", Des. Autom. for Emb. Syst., VI, 1/2, 1996, 69-120.
    • (1996) Des. Autom. for Emb. Syst , vol.6 , Issue.1-2 , pp. 69-120
    • Gupta, R.K.1    De Micheli, G.2
  • 10
    • 0021529549 scopus 로고
    • Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing
    • H. Kasahara, S. Narita, "Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing", IEEE Trans, on Comp., V33, No 1, 1984, 1023-1029.
    • (1984) IEEE Trans, on Comp , vol.33 , Issue.1 , pp. 1023-1029
    • Kasahara, H.1    Narita, S.2
  • 11
    • 0030656668 scopus 로고    scopus 로고
    • Embedded System Synthesis by Timing Constraint Solving
    • K. Kuchcinski, "Embedded System Synthesis by Timing Constraint Solving", Proc. Int. Symp. on Syst. Synth., 1997.
    • (1997) Proc. Int. Symp. on Syst. Synth
    • Kuchcinski, K.1
  • 12
    • 0000679218 scopus 로고
    • SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor Systems
    • S. Prakash, A. Parker, "SOS: Synthesis of Application-Specific Heterogeneous Multiprocessor Systems", Journal of Parallel and Distrib. Comp., V16, 1992, 338-351.
    • (1992) Journal of Parallel and Distrib. Comp , vol.16 , pp. 338-351
    • Prakash, S.1    Parker, A.2
  • 13
    • 0016518855 scopus 로고
    • NP-Complete Scheduling Problems
    • J.D. Ullman, "NP-Complete Scheduling Problems", Journal of Comput. Syst. Sci., 10, 384-393, 1975.
    • (1975) Journal of Comput. Syst. Sci , vol.10 , pp. 384-393
    • Ullman, J.D.1
  • 14
    • 0025462712 scopus 로고
    • Hypertool: A Programming Aid for Message-Passing Systems
    • M.Y. Wu, D.D. Gajski, "Hypertool: A Programming Aid for Message-Passing Systems", IEEE Trans, on Parallel and Distrib. Syst., V. 1, N. 3, 1990, 330-343.
    • (1990) IEEE Trans, on Parallel and Distrib. Syst , vol.1 , Issue.3 , pp. 330-343
    • Wu, M.Y.1    Gajski, D.D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.