On the use of fully specified initial states for testing of synchronous sequential circuits

IEEE Transactions on Computers

Volumn 49, Issue 2, 2000, Pages 175-182

  Pomeranz, Irith ^a,b   Reddy, Sudhakar M ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SYNCHRONOUS SEQUENTIAL CIRCUITS;

INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING;

SEQUENTIAL CIRCUITS;

EID: 0033906659     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.833114     Document Type: Article

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