Built-in test sequence generation for synchronous sequential circuits based on loading and expansion of test subsequences

Proceedings - Design Automation Conference

Volumn , Issue , 1999, Pages 754-759

  Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SEQUENTIAL CIRCUITS;

SYNCHRONOUS SEQUENTIAL CIRCUITS; TEST SEQUENCE GENERATION;

BUILT-IN SELF TEST;

EID: 0032681539     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/309847.310052     Document Type: Conference Paper

References (12)